All new Atmel AVRs with flashsize >8kByte have a buildin JTAG interface.
JTAG supports 3 essential functions for the development and production of hardware which is equipped with a new megaAVR.

1. Programming of the Flash and EEprom independent of CPU clock. This in most cases results in less programming time compared to the conventional SPI programming.
   
   
2. In-circuit dugging (ICE) by using the origin target CPU without any additional special sockets or soldering of ICE-PODs. Somewhat less powerful as a $4000 standard ICE the JTAG debugging supports very useful functions:
   • Breakpoint set/reset
   • Run/Stop
   • Single Step
   • Watches to Variables
   • Register and IO-Port view
     
     
3. Testing of the CPU and all ports through the Boundary Scan Feature of the CPU. To do this only a voltage must supplied to the target system, a programmed CPU is not necessary. Also the CPU's oscillator is not needed for the scan operation.
   
   The nternal Boundary-Scan-Chain of the CPU is used to read and also write all internal registers and ports of the controller chip. Because of this it is possible to remotely control each pin of the chip. By an appropriate control of the IO-pins of the CPU it is possible to change the states of the hardware (board) so that the result can be read back again by the IO-Pins of the CPU. With board design dependent pin-out states one must expect a specific reaction of the board's hardware which can found out by a read back of the pin states. Comparing the read result with expected values at least it is possible to make the decision board ok or failed. With a more sophisticated check and special algorithms it is possible to define the kind of problem and furthermore to locate the problem physically on the board.

Simplyfied interna of a megaAVR

E-LAB Tools which support the AVR JTAG functions

ISP-USB special version for AVRco Profi system customer

• JTAG programming
• JTAG Debugging
• SPI programmiing

ISP-V24 or ISP-USB standard version

• JTAG Programmiing
• SPI Programmiing

ISP-V24 or ISP-USB Tester version

• JTAG Boundary Scan Board testing
• JTAG programmiing
• SPI programmiing
  

ICP-V24 or ISP-USB standard version

• JTAG programming
• SPI programming
• Stand-alone and PC-operated

ICP-V24 or ICP-USB Tester version

• JTAG Boundary Scan Board testing
• JTAG programming
• SPI programming
• Stand-alone and PC-operated
  

Design of the E-LAB JTAG connectors

Flyer AVR-JTAG Info (PDF)